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ISLA224P
Switching Specifications
Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued)
MIN
MAX
PARAMETER
SYMBOL
CONDITION
(Note 5)
TYP
(Note 5)
UNITS
Overvoltage Recovery
t OVR
1
cycles
SPI INTERFACE (Notes 11, 12)
SCLK Period
t
CLK
Write Operation
7
cycles
t CLK
Read Operation
16
cycles
CSB ↓ to SCLK ↑ Setup Time
CSB ↑ after SCLK ↑ Hold Time
CSB ↑ after SCLK ↓ Hold Time
Data Valid to SCLK ↑ Setup Time
Data Valid after SCLK ↑ Hold Time
Data Valid after SCLK ↓ Time
t S
t H
t HR
t DS
t DH
t DVR
Read or Write
Write
Read
Write
Read or Write
Read
28
5
16
6
4
5
cycles
cycles
cycles
cycles
cycles
cycles
NOTES:
11. SPI Interface timing is directly proportional to the ADC sample period (t S ). Values above reflect multiples of a 4ns sample period, and must be scaled
proportionally for lower sample rates. ADC sample clock must be running for SPI communication.
12. The SPI may operate asynchronously with respect to the ADC sample clock.
13. The relative propagation delay is the difference in propagation time between any two devices that are matched in temperature and voltage, and is
specified over the full operating temperature and voltage range.
Typical Performance Curves
All Typical Performance Characteristics apply under the following conditions unless otherwise noted: AVDD = OVDD = 1.8V, T A = +25°C,
A IN = -dBFS, f IN = 105MHz, f SAMPLE = 250MSPS.
90
-65
85
SFDR AT 250MSPS
-70
HD3 AT 130MSPS
HD3 AT 250MSPS
80
75
SFDR AT 130MSPS
-75
-80
-85
HD2 AT 250MSPS
70
SNR AT 250MSPS
-90
-95
HD3 AT 130MSPS
65
SNR AT 130MSPS
-100
60
0
100
200
300
400
500
600
-105
0
100
200
300
400
500
600
INPUT FREQUENCY (MHz)
FIGURE 5. SNR AND SFDR vs f IN
13
INPUT FREQUENCY (MHz)
FIGURE 6. HD2 AND HD3 vs f IN
FN7570.1
November 30, 2012
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